Stable support for the functionality of the SignalTap II embedded logic analyzer.
Support all ALTERA chips.
FPGA: Stratix, Stratix II, Stratx III, Cyclone, Cyclone II, Cyclone III, Cyclone IV, ACEX1K, APEX20K, FLEX10K, etc.
CPLD: MAX3000、MAX7000、MAX9000 and MAXII
Active serial configuration devices: EPCS1, EPCS4, EPCS16, EPCS64, etc.
Enhanced configuration devices: EPC1, EPC4, etc.
Support three download modes: AS, PS and JTAG.
Voltage range: 1.2V~5V.
Latest Rev.C firmware! Support communication with the Nios II embedded soft core processor and debugging, support jtag_uart.
High speed: 6 times faster than the commonly ByteBlaster II.
Easy to use: MiniUSB interface makes connection convenient, and 2 status indicators make debugging more convenient.
Usage, function and performance are consistent with the ALTERA original download cable.